PowerMacintosh G3 - more internals

For the first time, Apple don¥t use an ASIC as PowerPC->PCI Bridge and Memorycontroller.
Now the Motorola MPC106 (Grackle) takes over and do a better Job.
Designed for CHRP, the MPC106 can handle up to 4 Prozessors (603, 604, G3, G4),
has a Level2(3) Cachememory Interface up to 1 MB (asysnc. or PBsync.) ,
a Memorycontroller for up to 1GB RAM (Pagemode-, EDO- and SDRAM support).
The MPC106 runs with a Systemclock up to 82.5 MHz(Rev.4 and up).

For the complete Databook(PDF) of the MPC106, visit the Motorola Webpage at:

http://www.mot.com/powerpc/

I/O Subsystem:

Based on the o¥Hare ASIC as PCI->Apple I/O Bridge, but more speedy (Better ATA, ATAPI),
they called it `Heathrow`.
Apple don¥t place the Soundchip(Screamer) on the Mainboard, that¥s also new.

For more Information download the Developer note from Apple:

http://developer.apple.com/techpubs/hardware/Developer_Notes/Macintosh_CPUs-G3/PowerMac_G3/PowerMac_G3.pdf